About
I work on hardware design verification, FPGAs, embedded systems, and low-level systems.
Education
Northwestern University, B.S. in Computer Engineering (class of 2027)
Experience
- ASIC Design Verification Intern, Cadence (Summer 2026)
- Machine Learning Intern, Woodward (Summer 2025)
Projects
Under construction. Check back soon.
Community
Under construction. Check back soon.
Contact
Email: satviki.m@gmail.com